Digital Controlled Oscillator of ADPLL designs -A Review

Authors

  • Kunjal Parmar Vishwakarma Government Engineering College, Chandkheda, Ahmedabad
  • Kirit Patel Vishwakarma Government Engineering College, Chandkheda, Ahmedabad
  • Alpesh Patel Vishwakarma Government Engineering College, Chandkheda, Ahmedabad

Keywords:

All digital phase locked loop (ADPLL), Phase locked loop (PLL)

Abstract

In this Brief, the basic architecture of ADPLL is discussed. And the advantage of ADPLL over analog PLL is
discussed. A review of various approaches to design the digital controlled oscillator of all digital phase locked loop (ADPLL)
is presented. Today the most challenging task for designing the phase locked loop (PLL) is to achieve fast locking time and
low jitter. In analog design the design complexity is increased. In this paper, advantages and disadvantages of this
approaches to design the digital controlled oscillator of all digital phase locked loop (ADPLL) is presented.

Published

2015-02-25

How to Cite

Kunjal Parmar, Kirit Patel, & Alpesh Patel. (2015). Digital Controlled Oscillator of ADPLL designs -A Review. International Journal of Advance Engineering and Research Development (IJAERD), 2(2), 316–322. Retrieved from https://ijaerd.com/index.php/IJAERD/article/view/559