Charge Injection & Clock Feed through Reduction Technique in Switched Capacitor Circuit

Authors

  • Jaymin M. Patel PG Student Electronic & Communication, LCIT-Bhandu Gujarat Technological University, Gujarat, India
  • Prof. Mehul L. Patel Assistant Professor Electronic & Communication, L.C. Institute of Technology Bhandu, Mahesana, Gujarat, India

Keywords:

Resistor, MOSFET, sample and hold, channel charge injection, clock feed through

Abstract

—Switched capacitor circuits fill a critical role in analog/digital interfaces particularly highly integrated
applications. The switched capacitor circuits are introduced for better performance and reduced area in CMOS
technology for both analog and digital functions. Basically switched capacitor circuits are combination of switches and
capacitor. And this combination of switches and capacitor replaces the resistor by passes charge into and out of
capacitors by controlling the switches. This chapter describes the basic building blocks and non-ideal effects of switched
capacitor circuits. Channel charge injection and clock feed-through are two major non-ideal effects existing in switched
capacitor circuit. This paper analysis the charge injection and clock feed through error in CMOS switched capacitor
circuits. For this reason, the basic S/H topology is used

Published

2015-04-25

How to Cite

Jaymin M. Patel, & Prof. Mehul L. Patel. (2015). Charge Injection & Clock Feed through Reduction Technique in Switched Capacitor Circuit. International Journal of Advance Engineering and Research Development (IJAERD), 2(4), 429–433. Retrieved from https://ijaerd.com/index.php/IJAERD/article/view/663